{"id":222,"date":"2021-03-23T14:16:20","date_gmt":"2021-03-23T13:16:20","guid":{"rendered":"https:\/\/threedots.ovh\/blog\/?p=222"},"modified":"2021-03-23T14:27:25","modified_gmt":"2021-03-23T13:27:25","slug":"thoughts-on-tachyum-part-2","status":"publish","type":"post","link":"https:\/\/threedots.ovh\/blog\/2021\/03\/thoughts-on-tachyum-part-2\/","title":{"rendered":"Thoughts on Tachyum (part 2)"},"content":{"rendered":"\n

(Part 1 at https:\/\/threedots.ovh\/blog\/2021\/01\/thoughts-on-tachyum\/<\/a>, let’s assume that most Tachyum claims are true)<\/p>\n\n\n\n

Tachyum is a company saying that their VLIW processor will change computing, being a “universal processor” that can be used for all workloads.<\/p>\n\n\n\n

They still claim that they’ll be able to ship their Prodigy processor this year. According to them, they were able to host a website on a software simulator. That doesn’t exactly mean much if anything on its own.<\/p>\n\n\n\n

They also say that they have a port of Linux and GCC ready. Given the difficulties that happen in trying to merge an architecture port to Linux (and such a thing isn’t easy for GCC either), that puts their software stack in a precarious position. <\/p>\n\n\n\n

Without a port upstream, the architecture has no chance whatsoever at success. The company cannot afford doing all that work by themselves, which includes porting a whole software ecosystem. <\/p>\n\n\n\n

As of today, Tachyum didn’t publish any code, with no ISA documentation whatsoever available to the public. For a CPU that will be released this year, that’s an incredibly big mistake.<\/p>\n\n\n\n

The single board with 4 FPGAs emulates 8 full processor cores including vector and matrix fixed and floating-point processing units.<\/p><\/blockquote>\n\n\n\n

As of today, the company claims<\/a> to have FPGAs ready that will ship soon to customers, with 2 cores per FPGA. Let’s assume that the Xilinx VU19P is used, being the largest FPGA commercially available today. It has 9 million system logic cells (and 3.8k DSP slices). That puts an upper size limit on how big those cores are.<\/p>\n\n\n\n

Links to Tachyum press releases :<\/p>\n\n\n\n